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Modeling of efficiency UHF class-D power amplifier with bandpass sigma-delta modulationстатья
- Авторы: Varlamov O.V., Chugunov I.V.
- Сборник: 2017 Systems of Signal Synchronization, Generating and Processing in Telecommunications (SINKHROINFO)
- Год издания: 2017
- Место издания: IEEE
- DOI: 10.1109/SINKHROINFO.2017.7997508
- Аннотация: Sigma-delta modulation is a method of constructing the radio frequency linear power amplifier with the using non-linear components. It can significantly simplify the structure of the power amplification path, which in this case shall operate as one-bit DACs. The preliminary modeling of potential different variants of the output stage in classes E, F, D (voltage switching and current switching) and the pulsed gate modulation was done. It is shown that the required linearity of amplitude characteristic can be realized only in the class D amplifier with voltage switching. Such an amplifier can be constructed in a bridge or half-bridge circuits. The simulation results show possibility of realization using modern components (LDMOS) Class D amplifier with voltage switching at 450 MHz with a power output of 100 watts in CW mode with output stage efficiency of 80% and 73% PAE. In the present article based on the modeling of work together Class D amplifier with a bandpass sigma-delta modulator shows the efficiency characteristics of the digital power amplifier at various levels of the input signal. Considers the reasons of peak power Class D amplifier underutilization when sigma-delta modulator using. It is shown that for OFDM signal with crest factor of 10 dB, the average efficiency of the amplifier with the power consumption of driver stage is 11%. The level of intermodulation distortion on the two-tone signal is less than -36 dB. We discuss the possibility of increasing the average efficiency of the amplification of signals with high crest factor on promising GaN HEMT transistors. It is shown that for the announced reduction of the output capacitance of transistors 5 times (compared to LDMOS technology) can be achieved efficiency values of the output stage 55% and 38% PAE. This exceeds the parameters of the existing solutions and motivate of continuing research into this promising technology for building power amplifiers. © 2017 IEEE.
- Добавил в систему: Варламов Олег Витальевич