ИСТИНА

The space NUCLEON project is designed to investigate a cosmic ray nuclei energy spectrum from 100 GeV to 1000 TeV as well as a cosmic ray electron spectrum from 20 GeV to 3 TeV. A method of energy determination by means of a silicon tracker for measuring the particle charge of space rays and calorimetric system were developed. The main parameters, that determine the quality of calorimetric systems are the dynamic range of input signals, which should reach tens thousands of single charge particles. Important parameters of read-out electronics are the consumed power, as well as the weight-size characteristics and reliability. This paper summarizes the design results for the read-out ASIC as one of the core elements. The ASIC with a unique high dynamic range (1 – 40 000 mip) at low power consumption (< 1.5 mW per channel) has been developed. The ASIC allows to record signals of relativistic particles and nuclei with a charges from Z = 1 up to Z > 50 from silicon detectors, having capacitances up to 100 pF. The chip structure includes 32 analog channels, consisting of charge sensitive amplifier (CSA) with PMOS input transistor (W=8mm, L=0.5μm), shaper (peaking time of 2 us) and T&H circuit. The ASIC showed a 120 pC dynamic range at a SNR of 2.5 for the minimal energy (1 mip) particles. The transfer function of CSA, having two subranges of different slopes (gains), allowed to reach a high dynamic range of the readout electronics. The splitting of the full dynamic range (from noise to saturation) into automatically switched subranges is considered as a specific feature of the designed circuit. An auxiliary class B amplifier is added to the CSA output. For small signals this amplifier is off and the CSA gain is determined by a relatively small feedback capacitance value and set to 0.15 V/pC. For higher amplitudes (~3 pC), the class B amplifier is dynamically switched on. In this case, an additional capacitor is added into the CSA feedback via the class B amplifier. That defines the equivalent feedback capacitance value of the CSA at level of 10 times higher, decreasing the CSA gain in the large amplitude region. All analog chain outputs are collected by analog multiplexor with output current driver and supplemented by a calibration system. The chip area is 4.0 × 4.0 mm.sq. The ASIC was fabricated by the 0.35 um CMOS process via Europractice and tested both at lab conditions and in the SPS beam at CERN.